A thin film transistor (hereinafter referred to as a “TFT”) has been conventionally used as a switching element of the pixel forming portion in an active matrix type liquid crystal display device. However, in recent years, in order to lower the manufacturing cost of a liquid crystal display device, a TFT has started to be used not only as a switching element of the pixel forming portion, but also for a driver circuit formed in the frame portion of a panel. Along with this trend, the development of a TFT equipped with a channel layer made up of microcrystalline silicon or polycrystalline silicon (hereinafter referred to as “crystalline silicon”), which have larger mobility than amorphous silicon, has been promoted.
However, there is a problem such that a current flowing from a drain electrode to a source electrode during a powered-off state (hereinafter referred to as an “OFF current”) becomes larger in a TFT equipped with the channel layer made up of crystalline silicon as compared to a TFT equipped with the channel layer made up of amorphous silicon.
In view of this, Japanese Patent Application Laid-Open Publication No. 2005-167051 suggests a bottom-gate TFT equipped with a channel layer having an amorphous silicon layer, and a microcrystalline silicon layer laminated thereon. FIG. 14 is a cross-sectional view showing the configuration of a conventional bottom-gate TFT 100 described in Japanese Patent Application Laid-Open Publication No. 2005-167051. As shown in FIG. 14, in the TFT 100, a gate electrode 120 is formed on a glass substrate 111, and a gate insulation film 112 is formed so as to cover the entire glass substrate 111 including the gate electrode 120. A microcrystalline silicon layer 142 is formed by performing laser-annealing of an amorphous silicon layer formed on the gate insulation film 112, and an amorphous silicon layer 143 is further formed on the microcrystalline silicon layer 142. The microcrystalline silicon layer 142 and the amorphous silicon layer 143 function as a channel layer 140 of the TFT 100. Formed on the left and right edges of the amorphous silicon layer 143 are ohmic contact layers 150a and 150b, which are made up of amorphous silicon doped with an n-type impurity in high concentration and each of which functions as a source or a drain. A source electrode 160a, which extends from the upper right edge portion of the ohmic contact layer 150a to the left direction, is formed, and a drain electrode 160b, which extends from the upper left edge of the ohmic contact layer 150b to the right direction, is formed. A protective film 190 is further formed so as to cover the entire TFT 100.